整数加减

不存在溢出的情况
When adding operands with different signs , overflow cannot occur.
如何探测溢出
Overflow occurs in subtraction when we subtract a negative number from a positive number and get a negative result, or when we subtract a positive number from a negative number and get a positive result. This means a borrow occurred from the sign bit.
为提高多媒体性能而提出的并行算术
By partitioning the carry chains within a 64-bit adder, a processor could perform simultaneous operations on short vectors of eight 8-bit operands, four I6-bit operands, or two 32-bit operands. The cost of such partitioned adder was small. These extensions have been called vector or SIMD, for single instructio multiple data(see Section 2.17 and Chapter 7).