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Systemverilog for Verification的书评 · · · · · · ( 全部 5 条 )

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哈尔滨的冬天 2009-11-19 14:45:32 未知出版社2009版

有错误，但很好

正在读，先记录一下感受。翻译的基本上还可以。就我读过的专业书籍来说，算是平均之上吧。能看得出来翻译的人是业内人士，而且对书中的例子大概也进行了调试，否则不会出现改动原书的代码的状况。在第八章我已经发现了至少两个地方对原书代码的改动。很不幸的是，都改错了... (展开)

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harris 2011-03-24 15:05:11 Springer2008版

a classic verification book

the best book of introducing verifcation using SV. It is worth taking a careful look. And you should run all the codes by yourself with VCS/NC/modelsim (展开)

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harris 2010-07-16 21:05:46 Springer2008版

excellent guide for verification

anyone who can thoroughly understand this book can become the expert of sv verification. (展开)

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sudoer 2009-05-08 10:06:18 Springer2008版

To read this book, you should have basic knowledge of Verilog. There are many examples in this book, very easy to understand. It's an introduction book for SystemVerilog Verification. If you want learn the language in depth, go IEEE1800 or VMM. You should... (展开)

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